Digilent JTAG-HS2 Programming Cable

Features and Specifications

• Analog Devices ADP123AUJZ Linear Regulator
• Small, complete, all-in-one JTAG programming solution for Xilinx FPGAs
• Compatible with all Xilinx tools
• Compatible with IEEE 1149.7-2009 Class T0 - Class T4 (includes 2-Wire JTAG)
• Separate Vref drives JTAG/SPI signal voltages; Vref can be any voltage between 1.8V and 5V.
• High-Speed USB2 port that can drive JTAG/SPI bus at up to 30Mbit/sec
• JTAG/SPI frequency settable by user
• Uses micro-AB USB2 connector
• SPI programming solution (modes 0 and 2 up to 30Mbit/sec, modes 1 and 3 up to 2Mbit/sec)
• Fully supported by Digilent's Adept software and Adept SDK, allowing custom JTAG/SPI applications to be created

Digilent's Joint Test Action Group (JTAG)-HS2 programming cable is a high-velocity programming tool for Xilinx field-programmable gate arrays (FPGAs). It is fully compatible with all Xilinx tools and can be smoothly operated from iMPACT, Chipscope, and EDK. The HS2 connects to target boards using Digilent's 6-pin, 100-mil spaced programming header or Xilinx's 2×7, 2mm connector with the provided adaptor.

The JTAG-HS2 is powered by the PC through the USB port and is recognized as a Digilent programming cable when connected to a PC, even if it's not connected to the target board. The HS2 has an independent Vdd pin to power the JTAG signal buffers. The high-speed 24mA three-state buffers enable target boards to drive the HS2 with signal voltages ranging from 1.8V to 5V and bus speeds up to 30MBit/sec. For the HS2 to work properly, its Vdd pin must be connected to the same voltage supply that powers the JTAG port on the FPGA.

The JTAG bus can be shared with other devices since systems keep JTAG signals at high-impedance unless they are actively driven during programming. The HS2 is supplied with a standard Type-A to Micro-USB cable that connects to the end of the module opposite the system board connector.

What's in the Box

• One JTAG-HS2 Programming Cable